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Perform RTL design tasks mostly in Verilog or SystemVerilog from project planning to closure throughout the complete digital design cycle. Work closely with team members across the globe. Always strive to improve your own skills to elevate 5 Systems.

What we offer

  • Attractive compensation package
  • Flexible working hours and full home office
  • Improving your professional skills
  • Innovative projects, leading-edge technologies
  • Fun at work

What we’d like to see

  • Degree in Electrical Engineering or Computer Science is preferred
  • Experience with Hardware Description Languages (Verilog, SystemVerilog, VHDL)
  • Exposure to ASIC or FPGA design flows
  • Experience with synthesis tools
  • Experience with scripting languages (Perl, TCL, Python, etc.)
  • Proficiency in English (both written and oral)

What’s nice to have

  • Prior experience with STA
  • Exposure to DFT, BIST
  • Vim + Tmux ☺



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